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authorFlorian Baumann <derflob@derflob.de>2017-04-29 14:07:33 +0200
committerFlorian Baumann <derflob@derflob.de>2017-04-29 14:07:33 +0200
commitf625a5fa9808e3bab2adc977594b336a86aa95e8 (patch)
treef644d44665f3adfc35396a4084bb445aaeecdd79
parentbf5abf9f29cbe418fc1f11e2827551d77e5ce9b6 (diff)
downloadBarESP-f625a5fa9808e3bab2adc977594b336a86aa95e8.tar.gz
BarESP-f625a5fa9808e3bab2adc977594b336a86aa95e8.tar.bz2
more caps is more better
-rw-r--r--BarESP.kicad_pcb927
-rw-r--r--BarESP.sch77
2 files changed, 534 insertions, 470 deletions
diff --git a/BarESP.kicad_pcb b/BarESP.kicad_pcb
index 76ff754..2bd4675 100644
--- a/BarESP.kicad_pcb
+++ b/BarESP.kicad_pcb
@@ -1,14 +1,14 @@
(kicad_pcb (version 4) (host pcbnew 4.0.6)
(general
- (links 91)
- (no_connects 0)
+ (links 93)
+ (no_connects 1)
(area 255.750829 13.957683 282.900831 113.107685)
(thickness 1.6)
(drawings 7)
- (tracks 313)
+ (tracks 318)
(zones 0)
- (modules 36)
+ (modules 37)
(nets 28)
)
@@ -103,22 +103,22 @@
(net 9 VDD)
(net 10 "Net-(L1-Pad2)")
(net 11 BC_EN)
- (net 12 "Net-(R5-Pad1)")
- (net 13 ESP_RX)
- (net 14 FLASH)
- (net 15 FLASH_TX)
- (net 16 BC_TX)
- (net 17 "Net-(R8-Pad2)")
- (net 18 "Net-(R10-Pad2)")
- (net 19 BC_RX)
- (net 20 "Net-(R7-Pad2)")
- (net 21 "Net-(D2-Pad2)")
- (net 22 "Net-(D3-Pad1)")
- (net 23 AT_MISO)
- (net 24 ADXL_INT1)
- (net 25 AT_MOSI)
- (net 26 AT_RESET)
- (net 27 CH_STAT)
+ (net 12 ESP_RX)
+ (net 13 FLASH)
+ (net 14 FLASH_TX)
+ (net 15 BC_TX)
+ (net 16 "Net-(R8-Pad2)")
+ (net 17 "Net-(R10-Pad2)")
+ (net 18 BC_RX)
+ (net 19 "Net-(R7-Pad2)")
+ (net 20 "Net-(D2-Pad2)")
+ (net 21 "Net-(D3-Pad1)")
+ (net 22 AT_MISO)
+ (net 23 ADXL_INT1)
+ (net 24 AT_MOSI)
+ (net 25 AT_RESET)
+ (net 26 CH_STAT)
+ (net 27 "Net-(C10-Pad1)")
(net_class Default "This is the default net class."
(clearance 0.3)
@@ -137,11 +137,11 @@
(add_net ESP_RX)
(add_net FLASH)
(add_net FLASH_TX)
+ (add_net "Net-(C10-Pad1)")
(add_net "Net-(D2-Pad2)")
(add_net "Net-(D3-Pad1)")
(add_net "Net-(R10-Pad2)")
(add_net "Net-(R3-Pad1)")
- (add_net "Net-(R5-Pad1)")
(add_net "Net-(R7-Pad2)")
(add_net "Net-(R8-Pad2)")
(add_net REST)
@@ -200,7 +200,7 @@
(pad 1 smd rect (at -2.2 0.975 180) (size 1.45 0.45) (layers B.Cu B.Paste B.Mask)
(net 11 BC_EN))
(pad 2 smd rect (at -2.2 0.325 180) (size 1.45 0.45) (layers B.Cu B.Paste B.Mask)
- (net 12 "Net-(R5-Pad1)"))
+ (net 27 "Net-(C10-Pad1)"))
(pad 3 smd rect (at -2.2 -0.325 180) (size 1.45 0.45) (layers B.Cu B.Paste B.Mask))
(pad 4 smd rect (at -2.2 -0.975 180) (size 1.45 0.45) (layers B.Cu B.Paste B.Mask)
(net 4 +5V))
@@ -220,12 +220,12 @@
)
(module Resistors_SMD:R_0805 (layer B.Cu) (tedit 5415CDEB) (tstamp 56940A62)
- (at 266 22.05 90)
+ (at 266.25 22.7 90)
(descr "Resistor SMD 0805, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0805")
(path /5692D50F)
(attr smd)
- (fp_text reference R6 (at 2.05 0 360) (layer B.SilkS)
+ (fp_text reference R6 (at 1.95 0 360) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 620k (at 0 -2.1 90) (layer B.Fab)
@@ -240,7 +240,7 @@
(pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
(net 4 +5V))
(pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 12 "Net-(R5-Pad1)"))
+ (net 27 "Net-(C10-Pad1)"))
(model Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -269,7 +269,7 @@
(pad 1 smd rect (at -0.95 0) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
(net 7 VSS))
(pad 2 smd rect (at 0.95 0) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 20 "Net-(R7-Pad2)"))
+ (net 19 "Net-(R7-Pad2)"))
(model Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -298,7 +298,7 @@
(pad 1 smd rect (at -0.95 0 270) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
(net 1 +3V3))
(pad 2 smd rect (at 0.95 0 270) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 14 FLASH))
+ (net 13 FLASH))
(model Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -415,7 +415,7 @@
(fp_line (start -0.25 -1.45) (end 0.25 -1.45) (layer B.SilkS) (width 0.15))
(fp_line (start -0.25 1.45) (end -0.25 -1.45) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -1.1 0.95 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
- (net 27 CH_STAT))
+ (net 26 CH_STAT))
(pad 2 smd rect (at -1.1 0 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
(net 7 VSS))
(pad 3 smd rect (at -1.1 -0.95 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
@@ -423,7 +423,7 @@
(pad 4 smd rect (at 1.1 -0.95 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
(net 9 VDD))
(pad 5 smd rect (at 1.1 0.95 180) (size 1.06 0.65) (layers B.Cu B.Paste B.Mask)
- (net 20 "Net-(R7-Pad2)"))
+ (net 19 "Net-(R7-Pad2)"))
(model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -539,7 +539,7 @@
(pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
(net 1 +3V3))
(pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 26 AT_RESET))
+ (net 25 AT_RESET))
(model Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -624,7 +624,7 @@
(fp_line (start 0.6 -0.875) (end -0.6 -0.875) (layer B.SilkS) (width 0.15))
(fp_line (start -0.6 0.875) (end 0.6 0.875) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.95 0 180) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 12 "Net-(R5-Pad1)"))
+ (net 27 "Net-(C10-Pad1)"))
(pad 2 smd rect (at 0.95 0 180) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
(net 7 VSS))
(model Resistors_SMD.3dshapes/R_0805.wrl
@@ -684,7 +684,7 @@
(pad 1 smd rect (at -0.95 0 270) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
(net 7 VSS))
(pad 2 smd rect (at 0.95 0 270) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 17 "Net-(R8-Pad2)"))
+ (net 16 "Net-(R8-Pad2)"))
(model Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -713,7 +713,7 @@
(pad 1 smd rect (at -0.95 0 270) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
(net 1 +3V3))
(pad 2 smd rect (at 0.95 0 270) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 18 "Net-(R10-Pad2)"))
+ (net 17 "Net-(R10-Pad2)"))
(model Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -740,7 +740,7 @@
(fp_line (start 0.6 -0.875) (end -0.6 -0.875) (layer B.SilkS) (width 0.15))
(fp_line (start -0.6 0.875) (end 0.6 0.875) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 13 ESP_RX))
+ (net 12 ESP_RX))
(pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
(net 1 +3V3))
(model Resistors_SMD.3dshapes/R_0805.wrl
@@ -788,7 +788,7 @@
(fp_text reference C8 (at 0 1.5 450) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
- (fp_text value 1μF (at 0 -2.1 270) (layer B.Fab)
+ (fp_text value 10μF (at 0 -2.1 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))
@@ -809,15 +809,15 @@
)
(module Capacitors_SMD:C_0805 (layer B.Cu) (tedit 5415D6EA) (tstamp 569C2CDA)
- (at 268.5 24 270)
+ (at 272.25 24.75 270)
(descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0805")
(path /569C24C1)
(attr smd)
- (fp_text reference C9 (at 0 -1.75 450) (layer B.SilkS)
+ (fp_text reference C9 (at -2.25 0 540) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
- (fp_text value 22μF (at 0 -2.1 270) (layer B.Fab)
+ (fp_text value 10μF (at 0 -2.1 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))
@@ -893,11 +893,11 @@
(fp_line (start 1.29916 0.65024) (end 1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start 1.49982 0.65024) (end 1.49982 -0.0508) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.95 -1.00076) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
- (net 16 BC_TX))
+ (net 15 BC_TX))
(pad 2 smd rect (at 0.95 -1.00076) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
- (net 15 FLASH_TX))
+ (net 14 FLASH_TX))
(pad 3 smd rect (at 0 0.99822) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
- (net 13 ESP_RX))
+ (net 12 ESP_RX))
(model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -1002,17 +1002,17 @@
(pad 9 thru_hole oval (at 14 -14) (size 2.5 1.1) (drill 0.65 (offset 0.7 0)) (layers *.Cu *.Mask B.SilkS)
(net 7 VSS))
(pad 10 thru_hole oval (at 14 -12) (size 2.5 1.1) (drill 0.65 (offset 0.6 0)) (layers *.Cu *.Mask B.SilkS)
- (net 17 "Net-(R8-Pad2)"))
+ (net 16 "Net-(R8-Pad2)"))
(pad 11 thru_hole oval (at 14 -10) (size 2.5 1.1) (drill 0.65 (offset 0.7 0)) (layers *.Cu *.Mask B.SilkS)
- (net 18 "Net-(R10-Pad2)"))
+ (net 17 "Net-(R10-Pad2)"))
(pad 12 thru_hole oval (at 14 -8) (size 2.5 1.1) (drill 0.65 (offset 0.7 0)) (layers *.Cu *.Mask B.SilkS)
- (net 14 FLASH))
+ (net 13 FLASH))
(pad 13 thru_hole oval (at 14 -6) (size 2.5 1.1) (drill 0.65 (offset 0.7 0)) (layers *.Cu *.Mask B.SilkS))
(pad 14 thru_hole oval (at 14 -4) (size 2.5 1.1) (drill 0.65 (offset 0.7 0)) (layers *.Cu *.Mask B.SilkS))
(pad 15 thru_hole oval (at 14 -2) (size 2.5 1.1) (drill 0.65 (offset 0.7 0)) (layers *.Cu *.Mask B.SilkS)
- (net 13 ESP_RX))
+ (net 12 ESP_RX))
(pad 16 thru_hole oval (at 14 0) (size 2.5 1.1) (drill 0.65 (offset 0.7 0)) (layers *.Cu *.Mask B.SilkS)
- (net 19 BC_RX))
+ (net 18 BC_RX))
(pad 17 thru_hole oval (at 1.99 -15 270) (size 2.5 1.1) (drill 0.65 (offset -0.7 0)) (layers *.Cu *.Mask B.SilkS))
(pad 18 thru_hole oval (at 3.99 -15 270) (size 2.5 1.1) (drill 0.65 (offset -0.7 0)) (layers *.Cu *.Mask B.SilkS))
(pad 19 thru_hole oval (at 5.99 -15 270) (size 2.5 1.1) (drill 0.65 (offset -0.7 0)) (layers *.Cu *.Mask B.SilkS))
@@ -1054,7 +1054,7 @@
(fp_line (start -1.95 -0.85) (end -1.95 0.85) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.95 0.85) (end 1.95 0.85) (layer B.CrtYd) (width 0.05))
(pad 2 smd rect (at 1.1 0 180) (size 1.2 1.2) (layers B.Cu B.Paste B.Mask)
- (net 21 "Net-(D2-Pad2)"))
+ (net 20 "Net-(D2-Pad2)"))
(pad 1 smd rect (at -1.1 0 180) (size 1.2 1.2) (layers B.Cu B.Paste B.Mask)
(net 7 VSS))
(model LEDs.3dshapes/LED_0805.wrl
@@ -1094,7 +1094,7 @@
(pad 2 smd rect (at 1.1 0) (size 1.2 1.2) (layers B.Cu B.Paste B.Mask)
(net 9 VDD))
(pad 1 smd rect (at -1.1 0) (size 1.2 1.2) (layers B.Cu B.Paste B.Mask)
- (net 22 "Net-(D3-Pad1)"))
+ (net 21 "Net-(D3-Pad1)"))
(model LEDs.3dshapes/LED_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -1133,15 +1133,15 @@
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 23 AT_MISO))
+ (net 22 AT_MISO))
(pad 2 thru_hole oval (at 2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 +3V3))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 24 ADXL_INT1))
+ (net 23 ADXL_INT1))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 25 AT_MOSI))
+ (net 24 AT_MOSI))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 26 AT_RESET))
+ (net 25 AT_RESET))
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 VSS))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_2x03_Pitch2.54mm.wrl
@@ -1177,9 +1177,9 @@
(fp_line (start 1.55 -0.9) (end 1.55 0.9) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.55 -0.9) (end -1.55 -0.9) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 27 CH_STAT))
+ (net 26 CH_STAT))
(pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 21 "Net-(D2-Pad2)"))
+ (net 20 "Net-(D2-Pad2)"))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -1213,9 +1213,9 @@
(fp_line (start 1.55 -0.9) (end 1.55 0.9) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.55 -0.9) (end -1.55 -0.9) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.95 0 90) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 27 CH_STAT))
+ (net 26 CH_STAT))
(pad 2 smd rect (at 0.95 0 90) (size 0.7 1.3) (layers B.Cu B.Paste B.Mask)
- (net 22 "Net-(D3-Pad1)"))
+ (net 21 "Net-(D3-Pad1)"))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -1255,18 +1255,18 @@
(fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer B.SilkS) (width 0.15))
(fp_line (start -2.075 2.525) (end -3.475 2.525) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
- (net 26 AT_RESET))
+ (net 25 AT_RESET))
(pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask))
(pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 5 REST))
(pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 7 VSS))
(pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
- (net 25 AT_MOSI))
+ (net 24 AT_MOSI))
(pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
- (net 23 AT_MISO))
+ (net 22 AT_MISO))
(pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
- (net 24 ADXL_INT1))
+ (net 23 ADXL_INT1))
(pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 +3V3))
(model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl
@@ -1292,11 +1292,11 @@
(fp_line (start 7.6 -7.9) (end 7.6 10.2) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -7.9) (end 7.6 -7.9) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -4.445 9.9745 180) (size 0.8 7) (layers B.Cu B.Paste B.Mask)
- (net 15 FLASH_TX))
+ (net 14 FLASH_TX))
(pad 2 smd rect (at -3.175 9.9745 180) (size 0.8 7) (layers B.Cu B.Paste B.Mask)
- (net 14 FLASH))
+ (net 13 FLASH))
(pad 3 smd rect (at -1.905 9.9745 180) (size 0.8 7) (layers B.Cu B.Paste B.Mask)
- (net 19 BC_RX))
+ (net 18 BC_RX))
(pad 4 smd rect (at -0.635 9.9745 180) (size 0.8 7) (layers B.Cu B.Paste B.Mask)
(net 5 REST))
(pad 5 smd rect (at 0.635 9.9745 180) (size 0.8 7) (layers B.Cu B.Paste B.Mask))
@@ -1327,7 +1327,7 @@
(fp_line (start 7.45 -1.15) (end 7.45 1.15) (layer B.SilkS) (width 0.15))
(fp_line (start -7.45 1.15) (end -7.45 -1.15) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -4.75 -1.65 180) (size 0.6 2) (layers B.Cu B.Paste B.Mask)
- (net 19 BC_RX))
+ (net 18 BC_RX))
(pad CON connect rect (at -5.75 -1.65 180) (size 0.8 2) (layers B.Cu B.Mask))
(pad CON connect rect (at -5.75 1.65 180) (size 0.8 2) (layers B.Cu B.Mask))
(pad CON connect rect (at 5.75 1.65 180) (size 0.8 2) (layers B.Cu B.Mask))
@@ -1355,7 +1355,7 @@
(pad 16 smd rect (at 2.75 1.65 180) (size 0.6 2) (layers B.Cu B.Paste B.Mask))
(pad 17 smd rect (at 3.25 -1.65 180) (size 0.6 2) (layers B.Cu B.Paste B.Mask))
(pad 18 smd rect (at 3.75 1.65 180) (size 0.6 2) (layers B.Cu B.Paste B.Mask)
- (net 16 BC_TX))
+ (net 15 BC_TX))
(pad 19 smd rect (at 4.25 -1.65 180) (size 0.6 2) (layers B.Cu B.Paste B.Mask))
(pad 20 smd rect (at 4.75 1.65 180) (size 0.6 2) (layers B.Cu B.Paste B.Mask))
)
@@ -1427,7 +1427,7 @@
(pad 7 thru_hole oval (at 15.5 7.62 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)
(net 1 +3V3))
(pad 9 thru_hole oval (at 15.5 2.54 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)
- (net 24 ADXL_INT1))
+ (net 23 ADXL_INT1))
(pad 8 thru_hole oval (at 15.5 5.08 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)
(net 7 VSS))
(pad 6 thru_hole oval (at 15.5 10.16 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)
@@ -1440,6 +1440,42 @@
)
)
+ (module Capacitors_SMD:C_0805 (layer B.Cu) (tedit 58AA8463) (tstamp 59047B45)
+ (at 268.25 22.75 270)
+ (descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
+ (tags "capacitor 0805")
+ (path /590446EC)
+ (attr smd)
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diff --git a/BarESP.sch b/BarESP.sch
index 6375db7..5694002 100644
--- a/BarESP.sch
+++ b/BarESP.sch
@@ -187,7 +187,7 @@ L R R6
U 1 1 5692D50F
P 3250 4700
F 0 "R6" V 3330 4700 50 0000 C CNN
-F 1 "620k" V 3250 4700 50 0000 C CNN
+F 1 "976k" V 3250 4700 50 0000 C CNN
F 2 "Resistors_SMD:R_0805" V 3180 4700 50 0001 C CNN
F 3 "" H 3250 4700 50 0000 C CNN
1 3250 4700
@@ -196,23 +196,23 @@ $EndComp
$Comp
L R R5
U 1 1 5692D8DC
-P 2900 5000
-F 0 "R5" V 2980 5000 50 0000 C CNN
-F 1 "200k" V 2900 5000 50 0000 C CNN
-F 2 "Resistors_SMD:R_0805" V 2830 5000 50 0001 C CNN
-F 3 "" H 2900 5000 50 0000 C CNN
- 1 2900 5000
+P 2900 5300
+F 0 "R5" V 2980 5300 50 0000 C CNN
+F 1 "309k" V 2900 5300 50 0000 C CNN
+F 2 "Resistors_SMD:R_0805" V 2830 5300 50 0001 C CNN
+F 3 "" H 2900 5300 50 0000 C CNN
+ 1 2900 5300
-1 0 0 -1
$EndComp
$Comp
L GND #PWR06
U 1 1 5692DB55
-P 2900 5200
-F 0 "#PWR06" H 2900 4950 50 0001 C CNN
-F 1 "GND" H 2900 5050 50 0000 C CNN
-F 2 "" H 2900 5200 50 0000 C CNN
-F 3 "" H 2900 5200 50 0000 C CNN
- 1 2900 5200
+P 2900 5500
+F 0 "#PWR06" H 2900 5250 50 0001 C CNN
+F 1 "GND" H 2900 5350 50 0000 C CNN
+F 2 "" H 2900 5500 50 0000 C CNN
+F 3 "" H 2900 5500 50 0000 C CNN
+ 1 2900 5500
-1 0 0 -1
$EndComp
$Comp
@@ -471,23 +471,23 @@ $EndComp
$Comp
L C C9
U 1 1 569C24C1
-P 3550 4950
-F 0 "C9" H 3575 5050 50 0000 L CNN
-F 1 "22μF" H 3575 4850 50 0000 L CNN
-F 2 "Capacitors_SMD:C_0805" H 3588 4800 50 0001 C CNN
-F 3 "" H 3550 4950 50 0000 C CNN
- 1 3550 4950
+P 3550 5250
+F 0 "C9" H 3575 5350 50 0000 L CNN
+F 1 "10μF" H 3575 5150 50 0000 L CNN
+F 2 "Capacitors_SMD:C_0805" H 3588 5100 50 0001 C CNN
+F 3 "" H 3550 5250 50 0000 C CNN
+ 1 3550 5250
-1 0 0 -1
$EndComp
$Comp
L GND #PWR015
U 1 1 569C2614
-P 3550 5200
-F 0 "#PWR015" H 3550 4950 50 0001 C CNN
-F 1 "GND" H 3550 5050 50 0000 C CNN
-F 2 "" H 3550 5200 50 0000 C CNN
-F 3 "" H 3550 5200 50 0000 C CNN
- 1 3550 5200
+P 3550 5500
+F 0 "#PWR015" H 3550 5250 50 0001 C CNN
+F 1 "GND" H 3550 5350 50 0000 C CNN
+F 2 "" H 3550 5500 50 0000 C CNN
+F 3 "" H 3550 5500 50 0000 C CNN
+ 1 3550 5500
-1 0 0 -1
$EndComp
$Comp
@@ -545,7 +545,7 @@ L C C8
U 1 1 569C6026
P 2050 4400
F 0 "C8" H 2075 4500 50 0000 L CNN
-F 1 "1μF" H 2075 4300 50 0000 L CNN
+F 1 "10μF" H 2075 4300 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805" H 2088 4250 50 0001 C CNN
F 3 "" H 2050 4400 50 0000 C CNN
1 2050 4400
@@ -917,7 +917,7 @@ Connection ~ 5200 6650
Wire Wire Line
3200 4250 3600 4250
Wire Wire Line
- 2900 5150 2900 5200
+ 2900 5450 2900 5500
Connection ~ 3550 4250
Wire Wire Line
1250 1050 1250 2500
@@ -1012,7 +1012,7 @@ Wire Wire Line
Wire Wire Line
1900 6450 1900 6950
Wire Wire Line
- 3550 5100 3550 5200
+ 3550 5400 3550 5500
Wire Wire Line
10000 6000 10100 6000
Wire Wire Line
@@ -1069,11 +1069,11 @@ Wire Wire Line
Wire Wire Line
4650 4550 4500 4550
Wire Wire Line
- 2900 4350 2900 4850
+ 2900 4350 2900 5150
Wire Wire Line
3200 4550 3600 4550
Wire Wire Line
- 3550 4550 3550 4800
+ 3550 4550 3550 5100
Connection ~ 3550 4550
Wire Wire Line
3400 4700 3550 4700
@@ -1248,4 +1248,21 @@ Wire Wire Line
7050 3950 7200 3950
Wire Wire Line
6750 3950 6650 3950
+$Comp
+L C C10
+U 1 1 590446EC
+P 3250 4900
+F 0 "C10" H 3275 5000 50 0000 L CNN
+F 1 "27pF" H 3275 4800 50 0000 L CNN
+F 2 "Capacitors_SMD:C_0805" H 3288 4750 50 0001 C CNN
+F 3 "" H 3250 4900 50 0000 C CNN
+ 1 3250 4900
+ 0 -1 1 0
+$EndComp
+Wire Wire Line
+ 3550 4900 3400 4900
+Connection ~ 3550 4900
+Wire Wire Line
+ 2900 4900 3100 4900
+Connection ~ 2900 4900
$EndSCHEMATC