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authorFlorian Baumann <derflob@derflob.de>2021-01-03 21:00:53 +0100
committerFlorian Baumann <derflob@derflob.de>2021-01-03 21:00:53 +0100
commitf375a4af505abd7fe3d0fa1d8792f3bdfdcd6a9b (patch)
treee9bc8c40aa30ca7f1f4bcef96bf0cc8212baf9f0
parente69439fd1ff0befd72b1775f9f7dea3a85bac9cf (diff)
downloadRJ45EEPROMKey-f375a4af505abd7fe3d0fa1d8792f3bdfdcd6a9b.tar.gz
RJ45EEPROMKey-f375a4af505abd7fe3d0fa1d8792f3bdfdcd6a9b.tar.bz2
use slotted RJ45 crimp pads
-rw-r--r--RJ45EEPROMKey.kicad_pcb412
-rw-r--r--RJ45EEPROMKey.sch2
2 files changed, 213 insertions, 201 deletions
diff --git a/RJ45EEPROMKey.kicad_pcb b/RJ45EEPROMKey.kicad_pcb
index 6881960..f754fa6 100644
--- a/RJ45EEPROMKey.kicad_pcb
+++ b/RJ45EEPROMKey.kicad_pcb
@@ -1,4 +1,4 @@
-(kicad_pcb (version 20171130) (host pcbnew 5.1.5)
+(kicad_pcb (version 20171130) (host pcbnew 5.1.8)
(general
(thickness 1.6)
@@ -36,7 +36,7 @@
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
- (zone_clearance 0.4)
+ (zone_clearance 0.3)
(zone_45_only no)
(trace_min 0.2)
(via_size 0.8)
@@ -117,6 +117,33 @@
(add_net "Net-(J1-Pad8)")
)
+ (module flobs-KiCad-footprints:RJ45Pads_sloted (layer F.Cu) (tedit 5FF2218D) (tstamp 5E46FEAD)
+ (at 16.25 17.5)
+ (path /5E471B81)
+ (fp_text reference J1 (at 1 0 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value RJ45Pads (at 0 -4.5) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole oval (at -1.125 3.5) (size 2.25 0.5) (drill oval 1.75 0.4) (layers *.Cu *.Mask)
+ (net 5 "Net-(J1-Pad1)"))
+ (pad 2 thru_hole oval (at -1.125 2.5) (size 2.25 0.5) (drill oval 1.75 0.4) (layers *.Cu *.Mask)
+ (net 7 "Net-(J1-Pad2)"))
+ (pad 3 thru_hole oval (at -1.125 1.5) (size 2.25 0.5) (drill oval 1.75 0.4) (layers *.Cu *.Mask)
+ (net 1 "Net-(J1-Pad3)"))
+ (pad 4 thru_hole oval (at -1.125 0.5) (size 2.25 0.5) (drill oval 1.75 0.4) (layers *.Cu *.Mask)
+ (net 3 "Net-(J1-Pad4)"))
+ (pad 5 thru_hole oval (at -1.125 -0.5) (size 2.25 0.5) (drill oval 1.75 0.4) (layers *.Cu *.Mask)
+ (net 4 "Net-(J1-Pad5)"))
+ (pad 6 thru_hole oval (at -1.125 -1.5) (size 2.25 0.5) (drill oval 1.75 0.4) (layers *.Cu *.Mask)
+ (net 6 "Net-(J1-Pad6)"))
+ (pad 7 thru_hole oval (at -1.125 -2.5) (size 2.25 0.5) (drill oval 1.75 0.4) (layers *.Cu *.Mask)
+ (net 8 "Net-(J1-Pad7)"))
+ (pad 8 thru_hole oval (at -1.125 -3.5) (size 2.25 0.5) (drill oval 1.75 0.4) (layers *.Cu *.Mask)
+ (net 2 "Net-(J1-Pad8)"))
+ )
+
(module Wire_Pads:SolderWirePad_single_0-8mmDrill (layer F.Cu) (tedit 5E470857) (tstamp 5E470A62)
(at 28.25 20.25)
(fp_text reference REF** (at 0 -2.54) (layer F.SilkS) hide
@@ -161,49 +188,6 @@
(pad 1 thru_hole oval (at 0 0) (size 2 1) (drill 0.5) (layers *.Cu *.Mask))
)
- (module flobs-KiCad-footprints:RJ45Pads (layer F.Cu) (tedit 5E46FFAA) (tstamp 5E46FEAD)
- (at 16.25 17.5)
- (path /5E471B81)
- (fp_text reference J1 (at 1 0 90) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_text value RJ45Pads (at 1 0 90) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (pad 1 thru_hole oval (at -0.5 3.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 5 "Net-(J1-Pad1)"))
- (pad 2 thru_hole oval (at -0.5 2.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 7 "Net-(J1-Pad2)"))
- (pad 3 thru_hole oval (at -0.5 1.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 1 "Net-(J1-Pad3)"))
- (pad 4 thru_hole oval (at -0.5 0.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 3 "Net-(J1-Pad4)"))
- (pad 5 thru_hole oval (at -0.5 -0.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 4 "Net-(J1-Pad5)"))
- (pad 6 thru_hole oval (at -0.5 -1.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 6 "Net-(J1-Pad6)"))
- (pad 7 thru_hole oval (at -0.5 -2.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 8 "Net-(J1-Pad7)"))
- (pad 8 thru_hole oval (at -0.5 -3.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 2 "Net-(J1-Pad8)"))
- (pad 8 thru_hole oval (at -1.75 -3.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 2 "Net-(J1-Pad8)"))
- (pad 7 thru_hole oval (at -1.75 -2.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 8 "Net-(J1-Pad7)"))
- (pad 6 thru_hole oval (at -1.75 -1.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 6 "Net-(J1-Pad6)"))
- (pad 5 thru_hole oval (at -1.75 -0.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 4 "Net-(J1-Pad5)"))
- (pad 4 thru_hole oval (at -1.75 0.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 3 "Net-(J1-Pad4)"))
- (pad 3 thru_hole oval (at -1.75 1.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 1 "Net-(J1-Pad3)"))
- (pad 2 thru_hole oval (at -1.75 2.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 7 "Net-(J1-Pad2)"))
- (pad 1 thru_hole oval (at -1.75 3.5) (size 0.75 0.5) (drill 0.4) (layers *.Cu *.Mask)
- (net 5 "Net-(J1-Pad1)"))
- )
-
(module TO_SOT_Packages_SMD:SOT-23-6 (layer F.Cu) (tedit 58CE4E7E) (tstamp 5E46FCD3)
(at 21.75 17.5)
(descr "6-pin SOT-23 package")
@@ -216,17 +200,17 @@
(fp_text value 25AA02E48T (at 0 2.9) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.1))
- (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.1))
- (fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer F.Fab) (width 0.1))
- (fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer F.Fab) (width 0.1))
- (fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer F.Fab) (width 0.1))
- (fp_line (start -1.9 -1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.9 1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.9 1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.9 -1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05))
- (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12))
(fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12))
+ (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.9 -1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.9 1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.9 1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.9 -1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.075)))
)
@@ -301,9 +285,9 @@
(segment (start 14.5 15) (end 15.75 15) (width 0.25) (layer B.Cu) (net 8))
(zone (net 5) (net_name "Net-(J1-Pad1)") (layer B.Cu) (tstamp 0) (hatch edge 0.508)
- (connect_pads (clearance 0.4))
- (min_thickness 0.3)
- (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+ (connect_pads (clearance 0.3))
+ (min_thickness 0.25)
+ (fill yes (arc_segments 32) (thermal_gap 0.5) (thermal_bridge_width 0.5))
(polygon
(pts
(xy 30.75 22) (xy 13.25 22) (xy 13.25 13) (xy 30.75 13)
@@ -311,74 +295,80 @@
)
(filled_polygon
(pts
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- (xy 19.841879 20.550006) (xy 19.737913 20.39441) (xy 19.718488 20.374985) (xy 19.737883 20.35559) (xy 19.841849 20.199994)
- (xy 19.913462 20.027105) (xy 19.94997 19.843567) (xy 19.94997 19.656433) (xy 19.913462 19.472895) (xy 19.841849 19.300006)
- (xy 19.737883 19.14441) (xy 19.718488 19.125015) (xy 19.737913 19.10559) (xy 19.841879 18.949994) (xy 19.913492 18.777105)
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diff --git a/RJ45EEPROMKey.sch b/RJ45EEPROMKey.sch
index 48e3447..3ef098b 100644
--- a/RJ45EEPROMKey.sch
+++ b/RJ45EEPROMKey.sch
@@ -30,7 +30,7 @@ U 1 1 5E471B81
P 1850 2900
F 0 "J1" H 1988 2355 50 0000 C CNN
F 1 "RJ45Pads" H 1988 2446 50 0000 C CNN
-F 2 "flobs-KiCad-footprints:RJ45Pads" H 1850 2750 50 0001 C CNN
+F 2 "flobs-KiCad-footprints:RJ45Pads_sloted" H 1850 2750 50 0001 C CNN
F 3 "" H 1850 2750 50 0001 C CNN
1 1850 2900
-1 0 0 1